EDN

Get a hands-on tutorial in FPGA design at ESC Silicon Valley

I just heard from my chum Jason Pecor at Alorium Technology. Jason and his colleague, Bryan Craker, will be giving a 2-hour tutorial at ESC Silicon Valley 2016. Titled A Novel Hands-On Approach to ...
Electronic Design

M.2 Module Merges FPGA and 32-GB Memory

1. BittWare’s 250-M2D FPGA Accelerator is built around a Xilinx Kintex UltraScale+ FPGA. The PCI Express (PCIe) interface supports NVMe, which is de facto high-speed storage interface. The module ...
wccftech

New AMD CPU patent reveals 3D-stacked machine learning accelerator design

On September 25, 2020, AMD issued a patent for a unique processor that offers a machine learning (ML) accelerator vertically stacked on the I/O die, or IOD. AMD may be preparing a data center-based ...
Embedded

Moving from FPGA to ASIC for your AI chip? Here’s what you should know

Perhaps you are designing an embedded inference engine for edge computing. Or you are taking the next step in automotive vision processing. Or maybe you have an insight that can challenge Nvidia and ...
Design-Reuse

CAST Introduces GZIP Accelerator Through New Intel FPGA Data Center Acceleration Ecosystem

WOODCLIFF LAKE, NJ USA, Oct. 17, 2017 – A hardware accelerator that addresses the data compression and storage optimization needs of performance-critical data center applications is now available from ...
Geeky Gadgets

AMD Alveo UL3524 FPGA based accelerator

The world of finance is a fast-paced environment where milliseconds can mean the difference between profit and loss. In this high-stakes arena, technology plays a crucial role in ensuring that ...